1. Field of the Invention
The present invention relates to a solid-state image pickup device and an image pickup camera including this solid-state image pickup device.
2. Description of the Related Art
A CCD (charge-coupled device) type solid-state image pickup device and a CMOS (complementary MOS (metal-oxide-semiconductor)) type solid-state image pickup device are known as solid-state image pickup devices.
FIG. 1 of the accompanying drawings is a schematic diagram showing an arrangement of a main portion of a CCD type solid-state imaging device according to the related art. As shown in FIG. 1, for example, a CCD type solid-state image pickup device, generally depicted by the reference numeral 71, includes an image pickup area comprising a semiconductor substrate 72, a plurality of light-receiving sensor portions 73 formed on the semiconductor substrate 72 in an XY-matrix fashion (i.e., in a two-dimensional fashion), a vertical transfer register 75 having a CCD structure in which a plurality of transfer electrodes 74 are arrayed through an insulating film in the vertical direction in response to each light-receiving sensor-portion column, a light-shielding layer 76 formed on the whole area except the light-receiving sensor portion 73, a color filter 78 provided through a planar layer 77 and an on-chip microlens 79 disposed on the color filter 78 in response to each light-receiving sensor portion 73.
FIG. 2A is a schematic diagram showing a central portion of an image pickup area of an example of a CMOS type solid-state image pickup device according to the related art, and FIG. 2B is a schematic diagram showing a marginal portion of an image pickup area of an example of a CMOS type solid-state image pickup device according to the related art. As shown in FIGS. 2A and 2B, for example, a CMOS type solid-state image pickup device, generally depicted by the reference numeral 61, includes an image pickup area comprising a semiconductor substrate 62, a plurality of light-receiving sensor portions 63, composed of photo-diodes, formed on the semiconductor substrate 62 in an XY-matrix fashion (i.e., in a two-dimensional fashion), a plurality of interconnection layers 65, in this example, first, second and third interconnection layers 651, 652, 653 formed through an interlayer insulator 64, a color filter 67 formed through a planar layer 66 and on-chip microlenses 68 formed on the color filter 67 in response to the respective light-receiving units 63.
These solid-state image pickup devices 61, 71 have taken measures to restrain so-called shading in which sensitivity on the marginal portion of the image pickup area decreases more than that of the central portion of the image pickup area.
This “shading” will be described with reference to FIG. 3. As shown in FIG. 3, in the solid-state image pickup device, since an optical center of an optical system 53 consisting of optical lenses 51 and 52 is located on a central prolonged line of an image pickup area 58, when an exit pupil distance (i.e., distance between an exit pupil and the light-receiving sensor portion) is limited, although light L1 is introduced at the central portion of the image pickup area 58 from the vertical direction, light L2 which becomes incident on the marginal portion of the image pickup area 58 increases.
At present, most of solid-state image pickup devices include on-chip microlenses provided on respective pixels. In the marginal portion of the image pickup area in which incident light from the oblique direction increases, the center at which light is focused by the on-chip microlens is shifted from the center of the light-receiving sensor portion and a rate at which light is focused on the light-receiving sensor portion decreases, thereby resulting in sensitivity being lowered. This decrease of sensitivity progressively increases from the central portion of the image pickup area to the marginal portion of the image pickup area, which leads to the cause of the shading. The on-chip microlens has been shifted in order to restrain such shading.
FIG. 4 shows an on-chip microlens shift structure of a pixel portion of the image pickup area 58. In this solid-state image pickup device, the on-chip microlens in which the center of the light-receiving sensor portion 63 and the center of the on-chip microlens have been arrayed at the same pitch in the whole of the related-art image pickup area is shifted in the center direction of the image pickup area 58 relative to the light-receiving sensor portion 63 as shown by an arrow a in FIG. 4. Consequently, the center at which light is focused on the on-chip microlens 68 and the center of the light-receiving sensor portion 63 are made identical to each other to increase an optical focusing rate, thereby making it possible to restrain the shading. This technology is also described in cited patent reference 1.
Since most of the CCD type solid-state image pickup devices have only one interconnection layer, the distance from the light-receiving sensor portion 73 (semiconductor substrate 72) to the on-chip microlens 79 is relatively short as shown in FIG. 1. Hence, it can be expected that the shading can be sufficiently restrained by only shifting the on-chip microlens 79.
On the other hand, since the CMOS type solid-state image pickup device uses the interconnection layer as the interconnection of the MOS transistor circuit, as shown in FIGS. 2A and 2B, it has been customary to form the interconnection layer 65 as a plurality of layers [651 to 653], and hence the distance between the light-receiving sensor portion 63 and the on-chip microlens 68 increases as compared with the CCD type solid-state image pickup device. As a result, it is unavoidable that light that has been focused by the on-chip microlens 68 will be interrupted by the interconnection layers 65 before it reaches the light-receiving sensor portion 65, and hence the optical focusing rate decreases. This decrease of the optical focusing rate becomes remarkable in the image pickup area at its marginal portion in which light that becomes incident from the oblique direction increases, which leads to the cause of shading. More specifically, in the case of the CMOS type solid-state image pickup device, as shown in FIG. 2A, since the incident light L1 is introduced into the central portion of the image pickup area from the vertical direction, it is not interrupted by the interconnection layers 65 [651 to 653] and can reach the light-receiving sensor portion 63. However, since the incident light L2 is introduced into the marginal portion of the image pickup area from the oblique direction, it is interrupted by the interconnection layers 65 so that the optical focusing rate in which light is focused on the light-receiving sensor portion 63 decreases.
To solve this problem, there is proposed a method in which, as shown in FIG. 5, the CMOS type solid-state image pickup device has opening portions formed through the uppermost layer of the interconnection layer most distant from at least the light-receiving sensor portion, in this example, metal interconnection layers [561 to 563] shifted relative to the light-receiving sensor portion 63 at the marginal portion of the image pickup area in the vertical and horizontal directions toward the central direction of the image pickup area to decrease the incident light L2 interrupted by the interconnection layers 56 thereby to restrain the decrease of the optical focusing rate and to restrain the shading (see cited patent reference 2).
[Cited Patent Reference 1]
Japanese laid-open patent application No. 6-140609
[Cited Patent Reference 2]
Japanese laid-open patent application No. 2001-237404
In the solid-state image pickup device having a plurality of interconnection layers, such as the CMOS type solid-state image pickup device, the on-chip microlenses are not electrically connected to other layers but a plurality of interconnection layers should be connected to each other electrically. Therefore, when the opening portions of the interconnection layers are shifted from the light-receiving sensor portions from the central direction of the image pickup area in both of the vertical and horizontal directions, this method makes restrictions imposed upon interconnection and layout of respective interconnection layers become very large, and hence this technique is difficult to realize.